The theme for the 2021 conference was System-in-Package (SiP) technology. Papers include discussions on board and system level failure analysis; detecting counterfeit microelectronics; emerging failure analysis techniques and concepts; future challenges of failure analysis; and scanning probe analysis.
The theme for the 2021 conference was System-in-Package (SiP) technology. Papers include discussions on board and system level failure analysis; detecting counterfeit microelectronics; emerging failure analysis techniques and concepts; future challenges of failure analysis; scanning probe analysis; hardware attacks, security, and reverse engineering; microscopy and material characterization; nanoprobing and electrical characterization; and more.
In the 21st century, the electronic market will be driven by consumers with demands of immediate entertainment, fast access to information, and communications anywhere in a personalized fashion and at affordable prices. The new challenge is not how many transistors can be built on a single chip, as in System-on-Chip (SoC), but rather how to integrate diverse circuits together predictably, harmoniously, and cost effectively. Instead of getting twice the transistors for the same cost as Moore's Law predicted in the past 50 years, the goal of SiP is to obtain the same number of transistors for half the cost within less than half the time to market.
